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Altera-AHDL语言设计的PCI总线Core
- Altera AHDL语言设计的PCI总线Core,很难得的PCI设计资料-Altera AHDL design Core PCI, the PCI is difficult to design information
PCI_Target_ip
- pci core altera fpga pci开发设计资料-pci core altera fpga development of design information pci
quartusII_licgen
- pci core altera fpga pci开发设计资料-pci core altera fpga development of design information pci
stand_lic
- pci core altera fpga pci开发设计资料-pci core altera fpga development of design information pci
Altera AHDL语言设计的PCI总线Core
- Altera AHDL语言设计的PCI总线-AHDL Altera's PCI bus design
pci.tar.gz 完成WB BUS和PCI bus之间的传输
- verilog编写的PCI总线，提供了Wishbone bus和PCI local bus之间的接口，内由两个独立的模块组成，分别完成WB BUS和PCI bus之间的传输,The PCI IP core (PCI bridge) provides an interface between the WISHBONE SoC bus and the PCI local bus. It consists of two independent units, one handling transact
PCI-IPcoreor1k[1]
- PCI的ip core，VHDL代码，希望对大家有帮助-PCI-ip core, VHDL code, we hope to help
pci_core.tar
- vhdl 写的 PCI IP核程序，已经过测试-pci ip core
fpgaPCI
- fpga开发pci的verilog，不可多得的源代码。-FPGA development pci of verilog, rare source code.
rs1_7seg_pci-0.0.1.tar
- Raggedstone1 IP core. Raggedstone1 is a low-cost Spartan3 FPGA based PCI development board made by Enterpoint Ltd. -Raggedstone1 IP core.Raggedstone1 is a low-cost Spartan3 FPGA based PCI development board made by Enterpoint Ltd.
PCIbus
- PCI总线核心工作机制分析，中文版的。针对PCI的关键概念和核心工作机制作简明扼要的分析，旨在有助于快速掌握PCI 的 工作原理-PCI bus working mechanism of the core analysis, the Chinese version. PCI for the key concepts and core work of producing a concise analysis of machine designed to help master the PCI
FPGA_8008
- pci pci转local bus总线的应用，使用IPcore alter器件-pci pci convert local bus application,use alter IP core
OXE800SE_OXE800DSE
- SATA NAS SOC，200MHz ARM926EJS核 SATA接口的NAS用处理器，集成USB2.0 HOST接口，Ethernet控制器，DDR SDRAM控制器，PCI HOST接口，可以扩展PCI外设。-SATA NAS SOC，NAS COntroller with 200MHz ARM926EJS core, intergated SATA controller，USB2.0 HOST controller，Ethernet MAC controller，DDR SDRAM c
Linux
- 本书对Linux操作系统及其编程作了整体的介绍，以支持用于开发软件的公开源码模型。对内存管理、进程及其通信机制、PCI、内核模块编程及内核系统结构作了详细的解释，且附有很多程序代码实例。对深入研究Linux下的编程有很大的帮助。 -The book and its programming on the Linux operating system, the overall presentation was made to support the development of software f
bijiaoqi
- pci 32位的core的实现源代码，我晕阿，实在是不好怎么说阿-pci 32-bit core of the realization of the source code, I fainted Ah, how to say it is not Arab. . . .
1
- 15个免费的IP核 usb11,i2c,pci_core,video_compression_systems等等.-15 free IP core usb11, i2c, pci_core, video_compression_systems and so on.
pciug159
- XILINX ISE生成PCI-CORE时产生的用户文档,帮助编写PCI通信用户逻辑,非常有用-XILINX ISE generation PCI-CORE generated user documentation to help users prepare PCI communication logic, a very useful
pci32_top_pci32_v4_8.vhd
- XINLINX的PCI核源文件代码,这是我在网上找的，希望对大家有用！-THE SOURCE FILE OF PCI CORE，IT IS FOUND ON INTERNET. MAYBE IT IS USEFUL.
pci_32tlite_oc
- 嵌入式 pci总线IP core的rtl源代码，用Verilog实现-Embedded pci bus IP core of the rtl source code, Verilog realization of
PCI_core
- pci代码,此代码仅供参考，不一定适合任何场合-pci core